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How to determine the rise/fall time for the input signal to SRAM?

Latest Updated:03/16/2012


Is there any specification of the rise/fall time for input signal to SRAM? When the regulation cannot be protected, what would happen?


The control signals of SRAM products are CS1#, CS2, OE#, WE#, UB#, and LB#. When performing a 16-bit read operation, the state of each control signal must be as follows.
WE# = High, CS1# = Low, CS2 = High, OE# = Low, and UB#/LB# = Low Data output starts when the last of the five control signals above is activated.
Suitable Products
CMOS Operational Amplifiers
Bipolar Operational Amplifiers
CMOS comparators
bipolar comparators
Asynchronous SRAM