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Will HIFCS# remains asserted during continuous writing and reading?

Latest Updated:03/23/2009

Question:

As for the host interface, the HIF chip select signal (HIFCS#) at the time of continuous writing and continuous reading remains asserted?

Answer:

The HIF chip select signal need not remain asserted.
The access is possible even if it is the specification to which the CS signal is asserted according to usual read/write timing.
Please follow the timing described in the hardware manual for the access timing of the cycle.
Suitable Products
SH7619
SH7618
SH7606