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Renesas Brasil - Knowledgebase

About PWM output by PWM function of timer RD (cycle change)

Last Updated:01/16/2018


After changing the PWM cycle when the PWM function of Timer RD is used, an unintended wave may be output for a period of one cycle. 
What is the cause of this unintended wave?


With the PWM function of Timer RD, when the value of a general register to specify a PWM cycle (e.g.: TRDGRAi) is rewritten, a compare match will not occur at the changed cycle if the value of Timer RD counter i (TRDi) is less than the rewritten value of the general register. And Timer RD continues counting until the TRDi overflows.
By using buffer operation, the value rewritten to the general register will be applicable (reflected) after the next cycle starts.
*Note that some channels may not support PWM output using buffer operation.
Please check this in the relevant user's manuals.
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