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How to switch operating clocks at power-on (78K0/Kx2 and 78K0R)?

Latest Updated:11/01/2007

Question:

Switching operating clocks at power-on (78K0/Kx2 and 78K0R)

Answer:

[Introduction]
In 78K0/Kx2 and 78K0R microcontrollers, a high-speed internal oscillator's clock signal is used to drive operations when powering on after a reset. Accordingly, when using a quartz resonator or a ceramic resonator, the oscillation circuit must be switched (and to do that, oscillation must be started before switching). Microcontrollers operate within a wide power supply voltage range (see the FAQ section entitled "Power supply voltage and operating clock "), and the frequencies that can be oscillated differ according to the power supply voltage being used. An example for the 78K0/Kx2 is shown below.

Example of power supply voltage and x1 oscillation frequency (78K0/Kx2)

Power supply voltage Oscillation frequency (MIN) Oscillation frequency (MAX)
4.0 V≦VDD≦5.5 V 1.0 MHz 20.0 MHz
2.7 V≦VDD<4.0 V 1.0 MHz 10.0 MHz
1.8 V≦VDD<2.7 V 1.0 MHz 5.0 MHz


Thus, when the possible oscillation frequencies vary according to the power supply voltage, caution is required concerning the handling of certain oscillation frequencies. Caution is especially needed when oscillating at the maximum frequency and using a POC (Power-On Clear).

[Steps prior to starting clock oscillation]
After the power is turned on, any power-on reset or POC has been canceled, and the microcontroller has started operating, before starting X1 oscillation, a low voltage detection circuit is used to detect when the power supply voltage has risen enough to support the oscillation frequency. A voltage value from the low range in the above table must be used as the low voltage detection circuit's detection voltage. For example, a power supply voltage of 2.7 V or above is needed for X1 oscillation at 10 MHz. The following two voltage options that are close to 2.7 V are candidates as the low voltage detection circuit's detection levels. Of these two, if VLVI10 slips downward it will become 2.6 V, which does not meet this condition. Therefore, VLVI9 is a better choice since it is over 2.7 V.

Voltage option Detection voltage
VLVI9 2.85 V±0.1V
VLVI10 2.70 V±0.1V


If the oscillation frequency is 5 MHz or below, there is no need to wait for the power supply voltage to rise. If it is above 10 MHz, the processing is the same except that VLVI10 should be selected.

•Specific processing
When interrupts are masked for the low voltage detection circuit (by setting masking as the default setting after a reset is cleared), the detection voltage can be set by setting "9" to the LVIS register. Next, the low voltage detection circuit can be started in interrupt mode by setting 80H to the LVIM register. After starting, there is a 10 µs wait for stabilization of operation, then the LVIM register is checked and another wait occurs until the LVIF bit becomes 0.
<Caution>It is possible that the watchdog timer may overflow, causing a reset, while waiting for the power supply voltage to rise. To avoid this, whenever a watchdog timer is being used, add processing (MOV WDTE, #0ACH) that clears the watchdog timer during the power supply rise wait loop.

•Sample programs
(Assembly language program)

        SET1    LVIMK           ; Mask low voltage detection interrupts
                                ; (as a precausion) 
        MOV     LVIS,#9         ; Set detection voltage (2.7V)
        MOV     LVIM,#80H       ; Start low voltage detection in interrupt mode
        MOV     B,#6            ; Set loop counter
LOOP1:
        DBNZ    B,$LOOP1        ; Wait at least 10 µs
LOOP2:
        MOV     WDTE,#0ACH      ; Add this only when using a watchdog timer
        BT      LVIF,$LOOP2     ; Wait for power supply rise
        CLR1    LVIIF           ; Clear interrupt request flag

(C language program)

#pragma NOP
        :
        unsigned char work;
        :
        LVIMK = 1;              /* Mask low voltage detection interrupts */
        LVIS = 0b00001001;      /* Set detection voltage (2.7 V) */
        LVIM = 0x80;            /* Start low voltage detection */
				/* in interrupt mode */
        for (work = 0; work < 4; work1++){
                NOP();
        }                       /* Wait at least 10 µs */
        while(LVIF){
                WDTE = 0x0AC;   /* Add this only when using a watchdog timer */

        }                       /* Wait for power supply rise */
        LVIIF = 0;              /* Clear interrupt request flag */


[Clock oscillation start processing]
•Specific processing
When the power supply voltage has reached the required level, the following processing to start X1 oscillation is performed according to the settings in the OSCCTL register. First, the AMPH bit is set according to the clock frequency to be used for oscillation. Next, EXCLK and OSCSEL are set. After that, the MSTOP bit is cleared to start X1 oscillation.

•Sample programs
(Assembly language program)

        CLR1    AMPH         ; Use SET1 when over 10 MHz
        CLR1    EXCLK        ; Since default value is 0, this is not necessary
                                ; but is done as a precaution
        SET1    OSCSEL       ; Select X1 oscillation mode
        CLR1    MSTOP        ; Start X1 oscillation

(C language program)

        AMPH = 0;            /* Set 1 when over 10 MHz */
        EXCLK = 0;           /* Since default value is 0, this is not necessary
                                but is done as a precaution */
        OSCSEL = 1;          /* Select X1 oscillation mode */
        MSTOP = 0;           /* Start X1 oscillation */


[Wait for stabilization of X1 oscillation]
When startup of X1 oscillation is set, oscillation does not occur immediately. First, a wait is required until oscillation has become stable. See also the FAQ section entitled "Clock oscillation stabilization time".

•Specific processing
The wait for oscillation stabilization is performed via the OSTC register. The wait operation lasts until one of the bits from bit4 to bit0 is set in the OSTC register (which bit it is depends on the quartz resonator or ceramic resonator being used for X1 oscillation). Ordinarily, when matching the oscillation circuit with a ceramic resonator, a wait time of approximately 100 µs is adequate, in which case the wait lasts until bit4 is set.

•Sample programs
(Assembly language program)

LOOP3:
        MOV     WDTE,#0ACH      ; Add this only using a watchdog timer
        BF      OSTC.4,$LOOP3   ; Wait for oscillation stabilization

(C language program)

        while(OSTC.4 == 0){
                WDTE = 0x0AC;   /* Add this only when using a watchdog timer */

        }                       /* Wait for oscillation stabilization */


[Clock switching]
Once X1 oscillation has become stable, the operating clock is switched from the high-speed internal oscillator to X1. Once this switch has been completed, the high-speed internal oscillator is stopped since it is no longer used. This completes the process of switching to X1. Afterward, the clock division rate should be set via the PCC register.

•Specific processing
Setting 1 to the MCM register's XSEL bit and MCM0 bit switches the operating clock. This switch can be confirmed by checking that the MCM register's MCS bit = 1. Afterward, set 1 to the RCM register's RSTOP bit to stop the high-speed internal oscillator.

•Sample programs
(Assembly language program)

        MOV     MCM,#00000101b  ; Switch clock
LOOP4:
        BF      MCS,$LOOP4      ; Wait for switch
        SET1    RSTOP           ; Stop oscillation of 
				; high-speed internal oscillator

(C language program)

        MCM = 0b00000101;       /* Switch clock */
        while(MCS == 0){
                NOP();
        }                       /* Wait for switch */
        RSTOP =1;               /* Stop oscillation of */
				/* high-speed internal oscillator */
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