Pular para o conteúdo principal
Renesas Brasil - Knowledgebase

How are error count value of B2ECT register and BER related in UPD98404?

Latest Updated:08/01/2005


For the UPD98404 ATM SONET framer, how are the error count value set to the B2ECT (B2 error counter) register and the bit error rate (BER) related?


One to 24 B2 errors are detected in 1 frame.
The B2ECT register adds up the detection error count for each frame and stores the cumulative count of detected errors from the preceding read until the current read.
The bit count of one STM-1 frame is as follows.

270byte x 9raw x 8bit=19440bit(125us)

Let's consider how the bit error rate (BER) is obtained using the receive bit stream count as the denominator and the error bit count as the numerator.
For example, if the counter value is read every 26 frames (26 x 125 us = 3250 us (505440 bits)) and is "5", BER = 10-5 or lower.

(5 / 505440) = 0.989 x 10-5 < 1 x 10-5 < (6 / 505440) = 1.187 x 10-5 (bit)
Suitable Products
Analog Switches