The timer interrupt request is selected as a DMA request factor. In this condition, if the timer underflows (overflows) when the timer interrupt request bit is "1", won't the DMA be initiated?
The DMAC has a DMA request bit, independent of the timer interrupt request bit which is the request factor. The DMA request bit is cleared when DMA is initiated. Regardless of the state of the timer interrupt request bit, the DMA request bit is set again at the next timer underflow (overflow) and DMA will be initiated.
|M16C/6NK, M16C/6NL, M16C/6NM, M16C/6NN|