A timing chart is a graph that represents how the electric signal voltage or current changes over time. Normally, voltage timing charts are used. The representation of data can be easily grasped by picturing the waveform of an oscilloscope. For example, in the case of a digital timing chart when a microcontroller reads data, the operation can be expressed as shown in the following figure.
(1) When the microcontroller outputs an address, the address signals and the selection signal (such as CS/ or CE/) generated by decoding parts of the address signals are input to memory or an I/O device.
(2) The microcontroller makes the strobe signal RD/ active (low level) (input OE/ in the case of SRAM).
(3) The selected memory or I/O device starts outputting data and fixes entire data 11 ns after making RD/ active (in the case of memory, this is called the access time).
(4) The microcontroller makes RD/ inactive 15 ns after making RD/ active.
(5) The microcontroller samples whether the data is high level (within VIH range) or low level (within VIL range) and loads the data then.
(6) The selected device cuts off data output 2 ns after RD/ goes inactive.
In the above operation, the data setup time is 4 ns and the hold time is 2 ns for the microcontroller's read operation. If the microcontroller's electrical characteristics (Min.) are each within the above time, the data is read successfully.
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Regarding data retention, there is, in addition to hold time, bus float delay time. The float delay time is the time from when the read strobe signal is made inactive until the data line becomes the floating (Hi-Z) state. This time may cause conflicts with the next bus cycle in high-speed systems. In high-speed microcontrollers, an idle cycle is sometimes inserted at the end of the bus cycle to prevent such conflict.