An overrun error occurs if the next data is received before the UiRB register is read. The error occurs when the bit immediately before the final stop bit of the next data is received.
If an overrun error occurs, please set the overrun error flag to 0 (no error). UARTi reception cannot be performed while the overrun error flag is 1.
An overrun error may be caused by the generation of a higher priority interrupt than UART reception, which as a result causes the next data to be received before data can be read from the UiRB register. Please adjust the interrupt priority or transmission interval of UART communication.